IDT54FCT377CT Datasheet | Integrated Device Tech

Integrated Device Technology, Inc. FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE IDT54/74FCT377T/AT/CT/DT Features : - Std., A, C and D speed grades - Low input and output leakage ≤1µA (max.) - CMOS power levels - True TTL input and output patibility - VOH = 3.3V (typ.) - VOL = 0.3V (typ.) - High drive outputs (-15m A IOH, 48m A IOL) - Power off disable outputs permit “live insertion” - Meets or exceeds JEDEC standard 18 specifications - Product available in Radiation Tolerant and Radiation Enhanced versions - Military product pliant to MIL-STD-883, Class B and DESC listed (dual marked) - Available in DIP, SOIC, QSOP, CERPACK and LCC packages DESCRIPTION: The IDT54/74FCT377T/AT/CT/DT are octal D flip-flops built using an advanced dual metal CMOS technology. The IDT54/ 74FCT377T/AT/CT/DT have eight edge-triggered, D-type flipflops with individual D inputs and O outputs. The mon buffered Clock (CP) input loads all flip-flops simultaneously when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop’s O output. The CE input must be stable only one set-up time prior to the LOW-to-HIGH transition for predictable operation. FUNCTIONAL BLOCK DIAGRAM D0 D1 D2 D3 D4 D5 D6 D7 CE DQ CP DQ CP DQ CP DQ CP DQ CP DQ CP DQ CP DQ CP O0 O1 O2 O3 O4 O5 O6...