IDT72V265LA Datasheet | Integrated Device Tech

3.3 VOLT CMOS SuperSync FIFO™ 8,192 x 18 16,384 x 18 Features : - - - - - - - IDT72V255LA IDT72V265LA - - - - - - - - - - - - - Choose among the following memory organizations: IDT72V255LA 8,192 x 18 IDT72V265LA 16,384 x 18 Pin-patible with the IDT72V275/72V285 and IDT72V295/ 72V2105 SuperSync FIFOs Functionally patible with the 5 Volt IDT72255/72265 family 10ns read/write cycle time (6.5ns access time) Fixed, low first word data latency time 5V input tolerant Auto power down minimizes standby power consumption Master Reset clears entire FIFO Partial Reset clears data, but retains programmable settings Retransmit operation with fixed, low first word data latency time Empty, Full...