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IDT72V295 Datasheet CMOS FIFO memories

Manufacturer: Integrated Device Tech

Datasheet Details

Part number IDT72V295
Manufacturer Integrated Device Tech
File Size 208.25 KB
Description CMOS FIFO memories
Download IDT72V295 Download (PDF)

General Description

: The IDT72V295/72V2105 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls.

These FIFOs offer numerous improvements over previous SuperSync FIFOs, including the following: • The limitation of the frequency of one clock input with respect to the other has been removed.

The Frequency Select pin (FS) has been removed, .UNCTIONAL BLOCK DIAGRAM WEN WCLK D0 -D17 LD SEN INPUT REGISTER OFFSET REGISTER FF/IR PAF EF/OR PAE HF FWFT/SI WRITE CONTROL LOGIC RAM ARRAY 131,072 x 18 262,144 x 18 FLAG LOGIC WRITE POINTER READ POINTER OUTPUT REGISTER MRS PRS READ CONTROL LOGIC RT RESET LOGIC RCLK REN OE Q0 -Q17 4668 drw 01 The SuperSync FIFO is a trademark and the IDT logo is a registered tra

Overview

3.3 VOLT HIGH DENSITY CMOS SUPERSYNC FIFO™ 131,072 x 18 262,144 x 18 .EATURES: • • • • • • • IDT72V295 IDT72V2105 • • • • • • • • • • • Choose among the following memory organizations: IDT72V295  131,072 x 18 IDT72V2105  262,144 x 18 Pin-compatible with the IDT72V255/72V265 and the IDT72V275/ 72V285 SuperSync FIFOs 10ns read/write cycle time (6.

Key Features

  • Master Reset, selects First Word Fall Through or IDT Standard mode. After Master Reset, this pin functions as a serial.