IDT72V3622 Datasheet | Integrated Device Tech

V3642 are functionally patible versions of the IDT723622/723632/723642, designed to run off a 3.3V supply for exceptionally low-power consumption. These devices are monolithic, highspeed, low-power, CMOS Bidirectional Sync FIFO (clocked) memories which support clock frequencies up to 100MHz and have read access times as fast as 6.5ns. Two independent 256/512/1,024 x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. munication between .UNCTIONAL BLOCK DIAGRAM CLKA CSA W/RA ENA MBA Mail 1 Register Input Register RAM ARRAY 256 x 36 512 x 36 1,024 x 36 Output Register Port-A Control Logic MBF1 RST1 FIFO1, Mail1 Reset Logic Write Pointer Read Pointer EFB/ORB AEB FFA/IRA AFA FIFO 1 Status Flag Logic FS0 FS1 A0 - A35 Programmable Flag Offset Registers FIFO 2 Timing Mode FWFT B0 - B35 EFA/ORA AEA Status Flag Logic Write Pointer FFB/IRB AFB Read Pointer RAM ARRAY 256 x 36 512 x 36 1,024 x 36 Mail 2 Register Output Register FIFO2, Mail2 Reset Logic Input Register RST2 Port-B Control Logic CLKB CSB W/RB ENB MBB 4660 drw...