IDT74FCT2543T Datasheet | Integrated Device Tech

FAST CMOS OCTAL LATCHED TRANSCEIVER Integrated Device Technology, Inc. IDT54/74FCT543T/AT/CT/DT IDT54/74FCT2543T/AT/CT Features : - mon Features : - Low input and output leakage ≤1µA (max.) - CMOS power levels - True TTL input and output patibility - VOH = 3.3V (typ.) - VOL = 0.3V (typ.) - Meets or exceeds JEDEC standard 18 specifications - Product available in Radiation Tolerant and Radiation Enhanced versions - Military product pliant to MIL-STD-883, Class B and DESC listed (dual marked) - Available in DIP, SOIC, SSOP, QSOP, CERPACK and LCC packages - Features for FCT543T: - Std., A, C and D speed grades - High drive outputs (-15m A IOH, 64m A IOL) - Power off disable outputs permit “live insertion” - Features for FCT2543T: - Std., A, and C speed grades - Resistor outputs (-15m A IOH, 12m A IOL .) (-12m A IOH, 12m A IOL Mil.) - Reduced system switching noise DESCRIPTION: The FCT543T/FCT2543T is a non-inverting octal transceiver built using an advanced dual metal CMOS technology. This device contains two sets of eight D-type latches with separate input and output controls for each set. For data flow from A to B, for example, the A-to-B Enable (CEAB) input must be LOW in order to enter data from A0- A7 or to take data from B0- B7, as indicated in the Function Table. With CEAB LOW, a LOW signal on the A-to-B Latch Enable (LEAB) input makes the A-to-B latches transparent; a subsequent LOW-to-HIGH transition of the LEAB signal puts the A latches in the storage mode and their outputs no longer change with the A inputs. With CEAB and OEAB both LOW, the 3-state B output buffers are active and reflect the data present at the output of the A latches. Control of data from B to A is similar, but uses the CEBA, LEBA and OEBA inputs. The FCT2543T has balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot and controlled output fall times-reducing the need for external series terminating resistors. FCT2xxx T parts are...