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IDT74FCT32932-100 Datasheet 3.3v Low Skew Pll-based CMOS Clock Driver

Manufacturer: Integrated Device Tech

Overview: IDT74FCT3932-100, IDT74FCT32932-100 LOW SKEW PLL-BASED CLOCK DRIVER MERCIAL TEMPERATURE RANGES IDT74FCT3932-100 IDT74FCT32932-100 3.3V LOW SKEW PLL-BASED ADVANCE INFORMATION CMOS CLOCK DRIVER Integrated Device Technology, Inc.

General Description

: The FCT3932 uses phase-lock loop technology to lock the frequency and phase of the feedback to the input reference clock.

It provides a large number of low skew outputs that are configurable in 16 different modes using the CNTRL 1-4 inputs.

A dedicated output, Q_FB, is provided to supply the PLL feedback and it should be connected to the FEEDBACK input.

Key Features

  • 0.5 MICRON CMOS Technology Guaranteed low skew 16 programmable frequency configurations 17 3-state outputs: ±24 mA FCT3932 ±8 mA FCT32932 Output configuration: BANK1: 4 outputs BANK2: 8 outputs BANK3: 5 outputs Dedicated feedback output (Q_FB) Maximum output frequency: 100MHz VCC = 3.3V ±0.3V Inputs can be driven from 3.3V or 5V components Available in 48 SSOP, TSSOP packages Suited to SDRAM.

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