DESCRIPTION
The outputs may select among LVPECL, LVDS, HCSL, or LVCMOS output levels. The 8T49N240 accepts up to two differential or single-ended input clocks and a fundamental-mode crystal input. The internal PLL can lock to either of the input reference clocks or just to the crystal to behave as a frequency synthesizer. The PLL can use the second input for redundant backup of the primary input reference, but in this case, both input clock references must be integer related in frequency. The device supports hitless reference switching be