ICS85105I Description
The ICS85105I is a low skew, high performance 1IC S to-5 Differential-to-0.7V HCSL Fanout Buffer and HiPerClockS™ a member of the HiPerClockS™ family of High Perfor mance Clock Solutions from IDT. The ICS85105I has two selectable clock inputs. The CLK0, nCLK0 pair can accept most standard differential input levels.
ICS85105I Key Features
- Five 0.7V differential HCSL outputs
- Selectable differential CLK0, nCLK0 or LVCMOS inputs
- CLK0, nCLK0 pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL
- CLK1 can accept the following input levels: LVCMOS or LVTTL
- Maximum output frequency: 500MHz
- Translates any single-ended input signal to 3.3V HCSL levels with resistor bias on nCLK input
- Output skew: 100ps (maximum)
- Part-to-part skew: 600ps (maximum)
- Propagation delay: 3.2ns (maximuml)
- Additive phase jitter, RMS: 0.24ps (typical)