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ICS854S057BI Datasheet 4:1 Or 2:1 Lvds Clock Multiplexer

Manufacturer: Integrated Device Technology

Overview: 4:1 or 2:1 LVDS Clock Multiplexer with Internal Input Termination ICS854S057BI DATA SHEET.

General Description

The ICS854S057BI is a 4:1 or 2:1 LVDS Clock ICS Multiplexer which can operate up to 2GHz.

The PCLK, HiPerClockS™ nPCLK pairs can accept most standard differential input levels.

Internal termination is provided on each differential input pair.

Key Features

  • High speed differential multiplexer. The device can be configured as either a 4:1 or 2:1 multiplexer.
  • One LVDS output pair.
  • Four selectable PCLK, nPCLK inputs with internal termination.
  • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML, SSTL.
  • Maximum output frequency: >2GHz.
  • Part-to-part skew: 200ps (maximum).
  • Propagation delay: 800ps (maximum).
  • Additive phase jitter, RMS: 0.065ps (ty.

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