IDT54FCT388915T datasheet by Integrated Device Technology.
| Part number | IDT54FCT388915T |
|---|---|
| Datasheet | IDT54FCT388915T_IntegratedDeviceTechnology.pdf |
| File Size | 145.69 KB |
| Manufacturer | Integrated Device Technology |
| Description | 3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE) |
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RST is low, all the outputs are put in high impedance state and The IDT54/74FCT388915T uses phase-lock loop technol- registers at Q, Q and Q/2 outputs are reset. ogy to lock the frequency and phase of outputs to the input The IDT54/74FCT388915T requires one external loop filter reference clock. It provides low skew clock distribution for ponent as remended in Figure.
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| IDT54FCT3827A | 3.3V CMOS 10-BIT BUFFERS |
| IDT54FCT3827B | 3.3V CMOS 10-BIT BUFFERS |
| IDT54FCT3244 | 3.3V CMOS OCTAL BUFFER/LINE DRIVER |
| IDT54FCT3244A | 3.3V CMOS OCTAL BUFFER/LINE DRIVER |
| IDT54FCT3245 | 3.3V CMOS OCTAL BIDIRECTIONAL TRANSCEIVERS |
| IDT54FCT3245A | 3.3V CMOS OCTAL BIDIRECTIONAL TRANSCEIVERS |
| IDT54FCT3573 | 3.3V CMOS OCTAL TRANSPARENT LATCHES |
| IDT54FCT3573A | 3.3V CMOS OCTAL TRANSPARENT LATCHES |
| IDT54FCT3574 | 3.3V CMOS OCTAL D REGISTERS (3-STATE) |
| IDT54FCT3574A | 3.3V CMOS OCTAL D REGISTERS (3-STATE) |
