IDT70V9279L Datasheet | Integrated Device Technology

HIGH-SPEED 3.3V 32K x 16 SYNCHRONOUS DUAL-PORT STATIC RAM Features : x x IDT70V9279S/L x x x x True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access - mercial: 9/12/15ns (max.) Low-power operation - IDT70V9279S Active: 429m W (typ.) Standby: 3.3m W (typ.) - IDT70V9279L Active: 429m W (typ.) Standby: 1.32m W (typ.) Flow-through or Pipelined output mode on either port via the FT/PIPE pin Counter enable and reset Features Dual chip enables allow for depth expansion without additional logic x x x x x Full synchronous operation on both ports - 4ns setup to clock and 1ns hold on all control, data, and address inputs - Data input, address, and control registers - Fast 9ns clock to data out in the Pipelined output mode - Self-timed write allows fast cycle time - 15ns cycle time, 66MHz operation in Pipelined output mode Separate upper-byte and lower-byte controls for multiplexed bus and bus matching patibility LVTTL- patible, single 3.3V (±0.3V) power supply Industrial temperature range (- 40°C to +85°C) is available for selected speeds Available in a 128-pin Thin Quad Flatpack (TQFP) package Functional Block Diagram R/WL R/WR UBR CE0R CE0L CE1L LBL OEL 1 0 0/1 1 0 0/1 CE1R LBR OER FT/PIPEL 0/1 1b 0bb a 1a 0a 0a 1a a...