IDT71216 Description
The IDT71216 is a 245,760-bit Cache Tag StaticRAM, organized 16K x 15 and designed to support PowerPC and other RISC processors at bus speeds up to 66MHz. There are twelve mon I/O TAG bits, with the remaining three bits used as status bits. A 12-bit parator is on-chip to allow fast parison of the twelve stored TAG bits and the current Tag input data.
IDT71216 Key Features
- 16K x 15 Configuration
- 12 TAG Bits
- 3 Separate I/O Status Bits (Valid, Dirty, Write Through)
- Match output uses Valid bit to qualify MATCH output
- High-Speed Address-to-Match parison times
- 8/9/10/12ns over mercial temperature range
- TA circuitry included inside the Cache-Tag for highest speed operation
- Asynchronous Read/Match operation with Synchronous Write and Reset operation
- Separate WE for the TAG bits and the Status bits
- Separate OE for the TAG bits, the Status bits, and TA