IDT72V36104 Overview
Key Specifications
Package: LFQFP
Mount Type: Surface Mount
Pins: 128
Operating Voltage: 3.3 V
Key Features
- Clock frequencies up to 100 MHz (6.5ns access time)
- Two independent clocked FIFOs buffering data in opposite directions
- Programmable Almost-Empty and Almost-Full flags; each has five default offsets (8, 16, 64, 256 and 1,024 )
- Serial or parallel programming of partial flags
- Retransmit Capability
- Port B bus sizing of 36 bits (long word), 18 bits (word) and 9 bits (byte)
- Big- or Little-Endian format for word and byte bus sizes
- Master Reset clears data and configures FIFO, Partial Reset clears data but retains configuration settings
- Mailbox bypass registers for each FIFO
- Free-running CLKA and CLKB may be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted)
Representative IDT72V36104 image (package may vary by manufacturer)
