IDT72V3643
DESCRIPTION
:
The IDT72V3623/72V3633/72V3643 are pin and functionally patible versions of the IDT723623/723633/723643, designed to run off a 3.3V supply .. for exceptionally low power consumption. These devices are monolithic, highspeed, low-power, CMOS unidirectional Synchronous (clocked) FIFO memory which supports clock frequencies up to 100 MHz and has read access times as fast as 6.5 ns. The 256/512/1,024 x 36 dual-port SRAM FIFO buffers data from Port A to Port B. FIFO data on Port B can output in 36-bit, 18-bit, or 9-bit formats with a choice of Big- or Little-Endian configurations. These devices are synchronous (clocked) FIFOs, meaning each port employs a synchronous interface. All data transfers through a port are gated to the LOW-to-HIGH transition of a port clock by enable signals. The clocks for
PIN CON.IGURATION
CSA FF/IR NC PRS VCC AF NC MBF2 MBA RS1 FS0/SD GND GND FS1/SEN RS2 MBB MBF1 VCC AE NC EF/OR NC GND CSB W/RB ENB
INDEX
39 40 41 42 43 44 45 46 47 48 49 50 51 52...
