DESCRIPTION
: Some of the main features are: programmable stream and channel control, Processor Mode, input offset delay and highimpedance output control. Per-stream input delay control is provided for managing large multi-chip switches that transport both voice channel and concatenated data channels. In addition, input streams can be individually calibrated for input frame offset. .UNCTIONAL BLOCK DIAGRAM VCC GND RESET TMS TDI TDO TCK TRST IC ODE Test Port RX0 RX1 RX2 RX3 RX4 RX5 RX6 RX7 RX8 RX9 RX10 RX11 RX12 RX13 RX14 RX15 TX0 TX1 TX2 TX3 TX4 TX5 TX6 TX7 TX8 TX9 TX10 TX11 TX12 TX13 TX14 TX15 Loopback Receive Serial Data Streams Data Memory Output MUX Transmit Serial Data Streams Internal Registers Connection Memory Timing Unit Microprocessor Interface CLK F0i FE IC AS/ IM DS/ RD ALE CS R/W/ A0-A7 DTA D8-D15/ WR AD0-AD7 CCO 5711 drw01 IDT, the IDT logo are registered trademarks of Integrated Device Technology, Inc. AUGUST 2001 1 DSC-5711/3 2001 Integrated Device Technology, Inc. All rights reserved.
Integrated Device Technology
