Datasheet Details
| Part number | IDT74FCT3932-100 |
|---|---|
| Manufacturer | Integrated Device Technology |
| File Size | 131.26 KB |
| Description | 3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER |
| Download | IDT74FCT3932-100 Download (PDF) |
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| Part number | IDT74FCT3932-100 |
|---|---|
| Manufacturer | Integrated Device Technology |
| File Size | 131.26 KB |
| Description | 3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER |
| Download | IDT74FCT3932-100 Download (PDF) |
|
|
|
: The FCT3932 uses phase-lock loop technology to lock the frequency and phase of the feedback to the input reference clock.
It provides a large number of low skew outputs that are configurable in 16 different modes using the CNTRL 1-4 inputs.
A dedicated output, Q_FB, is provided to supply the PLL feedback and it should be connected to the FEEDBACK input.
IDT74FCT3932-100, IDT74FCT32932-100 LOW SKEW PLL-BASED CLOCK DRIVER COMMERCIAL TEMPERATURE RANGES IDT74FCT3932-100 IDT74FCT32932-100 3.3V LOW SKEW PLL-BASED ADVANCE INFORMATION CMOS CLOCK DRIVER Integrated Device Technology, Inc.
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