IDT74LVCH16652 Datasheet | Integrated Device Technology

IDT74LVCH16652 3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS, 5V TOLERANT I/O, BUS-HOLD - Typical t SK(o) (Output Skew) < 250ps - ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200p F, R = 0) - VCC = 3.3V ± 0.3V, Normal Range - VCC = 2.7V to 3.6V, Extended Range - CMOS power levels (0.4µ W typ. static) .. - All inputs, outputs, and I/O are 5V tolerant - Supports hot insertion - Available in SSOP and TSSOP packages Features : DESCRIPTION: DRIVE Features : APPLICATIONS: - High Output Drivers: ±24m A - Reduced system switching noise - 5V and 3.3V mixed voltage systems - Data munication and telemunication systems This 16-bit transceiver and register is built using advanced dual metal CMOS technology. This high-speed, low power device is organized as twoindependent 8-bit bus transceivers with 3-state D-type registers. The control circuitry is organized for multiplexed transmission of data between A bus and B bus either directly or from the internal storage registers. Each 8-bit transceiver/register Features plementary Output Enable (OEAB and OEBA) inputs to control the transciever functions and Select lines (SAB and SBA) to select either real-time data or stored data. Separate clock inputsare provided for A and B port registers. Data on the A or B data bus, or both,can be stored in the internal registers by the low-to-high transitions at theappropriate clock pins. Flowthrough organization of signal pins simplifieslayout. All inputs are designed with hysteresis for improved noise margin. The LVCH16652A has been designed with a ±24m A output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance. The LVCH16652A has “bus-hold” which retains the inputs’ last state whenever the input bus goes to a high impedance. This prevents floating inputs and eliminates the...