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IDT79RC32332 - Integrated Communications Processors

Description

tables are also provided in this chapter.

Chapter 6, “CPU Exception Processing,” defines and describes the various exception types and handling processes for the RC32334.

Also provided in this chapter are the CPO register formats, their field descriptions, and general exception handling flowcharts.

Features

  • for the device as well as a system block diagram and internal register maps. Chapter 2, “RC32300 CPU Core,” describes the features of the RC32300 CPU core. Chapter 3, “CPU Instruction Set Overview,” presents a general overview on the three CPU instruction formats as well as the computational instructions of the MIPS architecture. Instruction set summary tables are also provided. Chapter 4, “CPU Pipeline Architecture,” discusses pipeline features as well as interlock and exception handling of the.

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Datasheet Details

Part number IDT79RC32332
Manufacturer Integrated Device Technology
File Size 4.98 MB
Description Integrated Communications Processors
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Full PDF Text Transcription

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IDT79RC32334 and IDT79RC32332 Integrated Communications Processors (Y Revision) RISCore™ 32300 Family w w User Reference Manual w .D at June 2002 aS he et 2975 Stender Way, Santa Clara, California 95054 Telephone: (800) 345-7015 • TWX: 910-338-2070 • FAX: (408) 330-1748 Printed in U.S.A. ©2001 Integrated Device Technology, Inc. 4U .c om www.DataSheet4U.com GENERAL DISCLAIMER Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible product. IDT does not assume any responsibility for use of any circuitry described other than the circuitry embodied in an IDT product.
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