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IDT8T33FS314I - LVPECL/ECL Fanout Buffer

Datasheet Summary

Description

The IDT8T33FS314I is a low skew 1-to-4 Differential Fanout Buffer, designed with clock distribution in mind, accepting two clock sources into an input MUX.

The MUX is controlled by a CLK_SEL pin.

Features

  • Four differential ECL/LVPECL level outputs.
  • One differential ECL/LVPECL or single-ended input (CLKA) One differential.

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Datasheet preview – IDT8T33FS314I

Datasheet Details

Part number IDT8T33FS314I
Manufacturer Integrated Device Technology
File Size 576.71 KB
Description LVPECL/ECL Fanout Buffer
Datasheet download datasheet IDT8T33FS314I Datasheet
Additional preview pages of the IDT8T33FS314I datasheet.

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Full PDF Text Transcription

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Low Skew, 1-to-4 Differential-to-2.5V, 3.3V IDT8T33FS314I LVPECL/ECL Fanout Buffer DATA SHEET General Description The IDT8T33FS314I is a low skew 1-to-4 Differential Fanout Buffer, designed with clock distribution in mind, accepting two clock sources into an input MUX. The MUX is controlled by a CLK_SEL pin. This makes the IDT8T33FS314I very versatile, in that, it can operate as both a differential clock buffer as well as a signal-level translator and fanout buffer. The device is designed on a SiGe process and can operate at frequencies in excess of 2.7GHz. This ensures negligible jitter introduction to the timing budget which makes it an ideal choice for distributing high frequency, high precision clocks across back planes and boards in communication systems.
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