IDT8T79S818I-08 Datasheet PDF - Integrated Device Technology 1-to-8 Differential to Universal Output Clock Divider/Fanout Buffer Specs

IDT8T79S818I-08 - 1-to-8 Differential to Universal Output Clock Divider/Fanout Buffer

Datasheet Summary

Description

The IDT8T79S818I-08 is a high performance, 1-to-8, differential input to universal output clock divider and fanout buffer.

Features

Four banks of two low skew outputs.
Selectable bank output divider values: ÷1 through ÷6 and ÷8.
One differential PCLK, nPCLK input.
PCLK, nPCLK input pair can accept the following differential input levels: LVPECL, LVDS levels.
Maximum input frequency: 1.5GHz.
LVCMOS control inputs.

Datasheet Details

Part number	IDT8T79S818I-08
Manufacturer	Integrated Device Technology
File Size	367.68 KB
Description	1-to-8 Differential to Universal Output Clock Divider/Fanout Buffer
Datasheet	IDT8T79S818I-08 Datasheet
Additional preview pages of the IDT8T79S818I-08 datasheet.

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Full PDF Text Transcription

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1-to-8 Differential to Universal Output Clock Divider/Fanout Buffer IDT8T79S818I-08 DATASHEET General Description The IDT8T79S818I-08 is a high performance, 1-to-8, differential input to universal output clock divider and fanout buffer. The device is designed for frequency-division and signal fanout of high-frequency clock signals in applications requiring four different output frequencies generated simultaneously. Each bank of two outputs has a selectable divider value of ÷1 through ÷6 and ÷8. The IDT8T79S818I-08 is optimized for 3.3V and 2.5V supply voltages and a temperature range of -40°C to 85°C. The device is packaged in a space-saving 32 lead VFQFN package.

Published: Nov 28, 2016 |