IDT29FCT521DT Overview
The IDT29FCT520AT/BT/CT/DT and IDT29FCT521AT/ BT/CT/DT each contain four 8-bit positive edge-triggered registers. These may be operated as a dual 2-level or as a single 4-level pipeline. A single 8-bit input is provided and any of the four registers is available at the 8-bit, 3-state output.
IDT29FCT521DT Key Features
- A, B, C and D speed grades Low input and output leakage ≤1µA (max.) CMOS power levels True TTL input and output patibili
- VOH = 3.3V (typ.)
- VOL = 0.3V (typ.) High drive outputs (-15mA IOH, 48mA IOL) Meets or exceeds JEDEC standard 18 specifications Product ava
- FUNCTIONAL BLOCK DIAGRAM