IDT5T9050 Datasheet | Integrated Device

IDT5T9050 2.5V SINGLE DATA RATE 1:5 CLOCK BUFFER TERABUFFER JR. INDUSTRIAL TEMPERATURE RANGE 2.5V SINGLE DATA RATE 1:5 CLOCK BUFFER TERABUFFER™ JR. Features : - - - - - - - - - - DESCRIPTION: Optimized for 2.5V LVTTL Guaranteed Low Skew < 25ps (max) Very low duty cycle distortion < 300 (max) High speed propagation delay < 1.8ns. (max) Up to 200MHz operation Very low CMOS power levels Hot insertable and over-voltage tolerant inputs 1:5 fanout buffer 2.5V VDD Available in TSSOP package The IDT5T9050 2.5V single data rate (SDR) clock buffer is a single-ended input to five single-ended outputs buffer built on advanced metal CMOS technology. The SDR clock buffer fanout from a single input to five single-ended outputs reduces the loading on the preceding driver and provides an efficient clock distribution network. Multiple power and grounds reduce noise. - Clock and signal distribution APPLICATIONS: FUNCTIONAL BLOCK DIAGRAM GL G O U TPUT C O N TR O L Q1 O U TPUT C O N TR O L Q2 O U TPUT C O N TR O L Q3 O U TPUT C O N TR O L Q4 O U TPUT C O N TR O L Q5 The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE OCTOBER...