IDT74FCT841CT Datasheet | Integrated Device

FAST CMOS BUS INTERFACE LATCHES Integrated Device Technology, Inc. IDT54/74FCT841AT/BT/CT/DT Features : - mon Features : - Low input and output leakage ≤1µA (max.) - CMOS power levels - True TTL input and output patibility - VOH = 3.3V (typ.) - VOL = 0.3V (typ.) - Meets or exceeds JEDEC standard 18 specifications - Product available in Radiation Tolerant and Radiation Enhanced versions - Military product pliant to MIL-STD-883, Class B and DESC listed (dual marked) - Available in DIP, SOIC, SSOP, QSOP, CERPACK and LCC packages - Features for FCT841T: - A, B, C and D speed grades - High drive outputs (-15m A IOH, 48m A IOL) - Power off disable outputs permit “live insertion” DESCRIPTION: The FCT8xx T series is built using an advanced dual metal CMOS technology. The FCT8xx T bus interface latches are designed to eliminate the extra packages required to buffer existing latches and provide extra data width for wider address/data paths or buses carrying parity. The FCT841T are buffered, 10-bit wide versions of the popular FCT373T function. They are ideal for use as an output port requiring high IOL/IOH. All of the FCT8xx T high-performance interface family can drive large capacitive loads, while providing low-capacitance bus loading at both inputs and outputs. All inputs have clamp diodes to ground and all outputs are designed for low-capacitance bus loading in high-impedance state. FUNCTIONAL BLOCK DIAGRAM D0 D1 D2 D3 D4 D5 D8...