IDT82V3011
Description
The IDT82V3011 is a T1/E1/OC3 WAN PLL with single reference input. It contains a Digital Phase-Locked Loop (DPLL), which generates low jitter ST-BUS and 19.44 MHz clock and framing signals that are pha.
Key Features
- Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces
- Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interface
- Selectable input reference: 8 kHz, 1.544 MHz, 2.048 MHz or 19.44 MHz
- Provides C1.5o, C3o, C2o, C4o, C6o, C8o, C16o, C19o and C32o output clock signals
- Provides 7 types of 8 kHz framing pulses: F0o, F8o, F16o, F19o, F32o, RSP and TSP
- Provides a C2/C1.5 output clock signal with the frequency controlled by the reference input Fref * * * * * * * * * * * * *
- IDT82V3011 Holdover frequency accuracy of 0.025 ppm Phase slope of 5 ns per 125 µs Attenuates wander from 2.1 Hz Fast lock mode Provides Time Interval Error (TIE) correction MTIE of 600 ns JTAG boundary scan Holdover status indication Freerun status indication Normal status indication Lock status indication Input reference quality indication 3.3 V operation with 5 V tolerant I/O Package available: 56-pin SSOP
