Datasheet Details
| Part number | IDT8P34S1208I |
|---|---|
| Manufacturer | Integrated Device |
| File Size | 252.16 KB |
| Description | 1:8 LVDS Output 1.8V Fanout Buffer |
| Datasheet |
 IDT8P34S1208I Datasheet
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General Description
The IDT8P34S1208I is a high-performance differential LVDS fanout buffer.
The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals.
The IDT8P34S1208I is characterized to operate from a 1.8V power supply.
Key Features
- Eight low skew, low additive jitter LVDS output pairs Two selectable, differential clock input pairs Differential CLK, nCLK pairs can accept the following differential input levels: LVDS, CML Maximum input clock frequency: 1.2GHz (maximum) LVCMOS/LVTTL interface levels for the control input select pin Output skew: 20ps (typical) Propagation delay: 315ps (typical) Low additive phase jitte.