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42S16800A - 16Meg x 8/ 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM

Description

A0-A11 A0-A9 BA0, BA1 I/O0 to I/O7 CLK CKE CS RAS CAS Row Address Input Column Address Input Bank Select Address Data I/O System Clock Input Clock Enable Chip Select Row Address Strobe Command Column Address Strobe Command WE DQM VDD Vss VDDQ VssQ NC Write Enable x 8 Lower Byte, Input/Output Mask P

Features

  • Clock frequency: 166,143,100 MHz.
  • Fully synchronous; all signals referenced to a positive clock edge.
  • Internal bank for hiding row access/precharge.
  • Power supply IS42S81600A IS42S16800A IS42S32400A.
  • LVTTL interface.
  • Programmable burst length.
  • (1, 2, 4, 8, full page).
  • Programmable burst sequence: Sequential/Interleave.
  • Auto Refresh (CBR).
  • Self Refresh with programmable refresh periods.
  • 4096 refresh.

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Other Datasheets by ISSI (now Infineon)

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Full PDF Text Transcription

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IS42S81600A, IS42S16800A, IS42S32400A, 16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM FEATURES • Clock frequency: 166,143,100 MHz • Fully synchronous; all signals referenced to a positive clock edge • Internal bank for hiding row access/precharge • Power supply IS42S81600A IS42S16800A IS42S32400A • LVTTL interface • Programmable burst length – (1, 2, 4, 8, full page) • Programmable burst sequence: Sequential/Interleave • Auto Refresh (CBR) • Self Refresh with programmable refresh periods • 4096 refresh cycles every 64 ms • Random column address every clock cycle • Programmable CAS latency (2, 3 clocks) • Burst read/write and burst read/single write operations capability • Burst termination by burst stop and precharge command • Industrial Temperature Availability • Lead-free Avai
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