Datasheet Details
| Part number | IS61DDPB42M18A2 |
|---|---|
| Manufacturer | Integrated Silicon Solution |
| File Size | 558.92 KB |
| Description | 36Mb DDR-IIP(Burst 4) CIO SYNCHRONOUS SRAM |
| Datasheet |
 IS61DDPB42M18A2 Datasheet
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This page provides the datasheet information for the IS61DDPB42M18A2, a member of the IS61DDPB42M18A 36Mb DDR-IIP(Burst 4) CIO SYNCHRONOUS SRAM family.
| Part number | IS61DDPB42M18A2 |
|---|---|
| Manufacturer | Integrated Silicon Solution |
| File Size | 558.92 KB |
| Description | 36Mb DDR-IIP(Burst 4) CIO SYNCHRONOUS SRAM |
| Datasheet |
IS61DDPB42M18A2 Datasheet
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1Mx36 and 2Mx18 configuration available.
On-chip Delay-Locked Loop (DLL) for wide data valid window.
Common I/O read and write ports.
Synchronous pipeline read with self-timed late write operation.
Double Data Rate (DDR) interface for read and write input ports.