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IS61NSCS51236 Datasheet Synchronous SRAM

Manufacturer: ISSI (now Infineon)

Download the IS61NSCS51236 datasheet PDF. This datasheet also includes the IS61NSCS25672 variant, as both parts are published together in a single manufacturer document.

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Note: The manufacturer provides a single datasheet file (IS61NSCS25672_IntegratedSiliconSolution.pdf) that lists specifications for multiple related part numbers.

Overview

IS61NSCS25672 IS61NSCS51236 Σ RAM 256K x 72, 512K x 36.

Key Features

  • JEDEC SigmaRam pinout and package standard.
  • Single 1.8V power supply (VCC): 1.7V (min) to 1.9V (max).
  • Dedicated output supply voltage (VCCQ): 1.8V or 1.5V typical.
  • LVCMOS-compatible I/O interface.
  • Common data I/O pins (DQs).
  • Single Data Rate (SDR) data transfers.
  • Pipelined (PL) read operations.
  • Double Late Write (DLW) write operations.
  • Burst and non-burst read and write operations, selectable via dedicated control.

More Datasheets from ISSI (now Infineon)

Part Number Description
IS61NSCS25672 Synchronous SRAM
IS61NLF204836B FLOW THROUGH (NO WAIT) STATE BUS SRAM
IS61NLF409618B FLOW THROUGH (NO WAIT) STATE BUS SRAM
IS61NLF51236 STATE BUS SRAM
IS61NLP102436A 36Mb STATE BUS SRAM
IS61NLP204818A 36Mb STATE BUS SRAM
IS61NLP204836B PIPELINE (NO WAIT) STATE BUS SRAM
IS61NLP409618B PIPELINE (NO WAIT) STATE BUS SRAM
IS61NVF102418 STATE BUS SRAM
IS61NVF204836B FLOW THROUGH (NO WAIT) STATE BUS SRAM