IS61NVP102436A - 36Mb STATE BUS SRAM

This page provides the datasheet information for the IS61NVP102436A, a member of the IS61NVP204818A 36Mb STATE BUS SRAM family.

Product Overview

Integrated Silicon Solution

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Datasheet Details

Part number	IS61NVP102436A
Manufacturer	Integrated Silicon Solution
File Size	168.59 KB
Description	36Mb STATE BUS SRAM
Datasheet	IS61NVP102436A Datasheet
Additional preview pages of the IS61NVP102436A datasheet.

IS61NVP102436A Product details

Description

The 36 Meg 'NLP/NVP' product family feature high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance, 'no wait' state, device for networking and communications applications.

Features

100 percent bus utilization.
No wait cycles between Read and Write.
Internal self-timed write cycle.
Individual Byte Write Control.
Single R/W (Read/Write) control pin.
Clock controlled, registered address, data and control.
Interleaved or linear burst sequence control using MODE input.
Three chip enables for simple depth expansion and address pipelining.
Power Down mode.
Common data inputs and data output.

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Other Datasheets by Integrated Silicon Solution

IS61NVP204818A - 36Mb STATE BUS SRAM
IS61NVP204836B - PIPELINE (NO WAIT) STATE BUS SRAM
IS61NVP409618B - PIPELINE (NO WAIT) STATE BUS SRAM
IS61NVF102418 - STATE BUS SRAM
IS61NVF204836B - FLOW THROUGH (NO WAIT) STATE BUS SRAM
IS61NVF409618B - FLOW THROUGH (NO WAIT) STATE BUS SRAM
IS61NVF51236 - STATE BUS SRAM
IS61NVVF204836B - FLOW THROUGH (NO WAIT) STATE BUS SRAM

Published: Mar 24, 2010 |