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IS61VPS204818A - 36Mb Single CYCLE DESELECT STATIC RAM

Download the IS61VPS204818A datasheet PDF. This datasheet also covers the IS61LPS204818A variant, as both devices belong to the same 36mb single cycle deselect static ram family and are provided as variant models within a single manufacturer datasheet.

General Description

204818A are high-speed, low-power synchronous static RAMs designed to provide burstable, high-performance memory for communication and networking applications.

Key Features

  • Internal self-timed write cycle.
  • Individual Byte Write Control and Global Write.
  • Clock controlled, registered address, data and control.
  • Burst sequence control using MODE input.
  • Three chip enable option for simple depth ex- pansion and address pipelining.
  • Common data inputs and data outputs.
  • Auto Power-down during deselect.
  • Single cycle deselect.
  • Snooze MODE for reduced-power standby.
  • Power Supply LPS: V.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IS61LPS204818A_IntegratedSiliconSolution.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
IS61vPS102436A IS61lPS102436A IS61vPS204818A IS61lPS204818A 1Mb x 36, 2Mb x 18 36Mb SYNCHRONOUS PIPELINED, Single CYCLE DESELECT STATIC RAM JUNE 2010 FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth ex- pansion and address pipelining • Common data inputs and data outputs • Auto Power-down during deselect • Single cycle deselect • Snooze MODE for reduced-power standby • Power Supply LPS: Vdd 3.3V + 5%, Vddq 3.3V/2.5V + 5% VPS: Vdd 2.5V + 5%, Vddq 2.