IS80C52 Datasheet | ISSI

DESCRIPTION ISSI® ® CMOS SINGLE CHIP LOW VOLTAGE 8-BIT MICROCONTROLLER FEATURES - 80C51 based architecture - 8K x 8 ROM (IS80C52 only) - 256 x 8 RAM .. - Three 16-bit Timer/Counters - Full duplex serial channel - Boolean processor - Four 8-bit I/O ports, 32 I/O lines - Memory addressing capability - 64K ROM and 64K RAM - Program memory lock - Encrypted verify (32 bytes) - Lock bits (2) - Power save modes: - Idle and power-down - Eight interrupt sources - Most instructions execute in 0.3 µs - CMOS and TTL patible - Maximum speed: 40 MHz @ Vcc = 5V - Industrial temperature available - Packages available: - 40-pin DIP - 44-pin PLCC - 44-pin PQFP The ISSI IS80C52 and IS80C32 are high-performance microcontrollers fabricated using high-density CMOS technology. The CMOS IS80C52/32 is functionally patible with the industry standard 8052/32 microcontrollers. The IS80C52/32 is designed with 8K x 8 ROM (IS80C52 only); 256 x 8 RAM; 32 programmable I/O lines; a serial I/O port for either multiprocessor munications, I/O expansion or full duplex UART; three 16-bit timer/counters; an eight-source, two-priority-level, nested interrupt structure; and an on-chip oscillator and clock circuit. The IS80C52/32 can be expanded using standard TTL patible memory. T2/P1.0 T2EX/P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST Rx D/P3.0 Tx D/P3.1 INT0/P3.2 INT1/P3.3 T0/P3.4 T1/P3.5 WR/P3.6 RD/P3.7 XTAL2 XTAL1 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 VCC P0.0/AD0 P0.1/AD1 P0.2/AD2 P0.3/AD3 P0.4/AD4 P0.5/AD5 P0.6/AD6 P0.7/AD7 EA ALE PSEN P2.7/A15 P2.6/A14 P2.5/A13 P2.4/A12 P2.3/A11 P2.2/A10 P2.1/A9 P2.0/A8 Figure 1. IS80C52/32 Pin Configuration: 40-pin PDIP ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 1998, Integrated Silicon...