Datasheet Summary
80960SB EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS s High-Performance Embedded Architecture s Built-in Interrupt Controller
- 16 MIPS- Burst Execution at 16 MHz
- 5 MIPS Sustained Execution at 16 MHz s 512-Byte On-Chip Instruction Cache
- Direct Mapped
- Parallel Load/Decode for Uncached Instructions s Multiple Register Sets
- Sixteen Global 32-Bit Registers
- Sixteen Local 32-Bit Registers
- Four Local Register Sets Stored On-Chip
- Register Scoreboarding s Pin patible with 80960SA
- 4 Direct Interrupt Pins
- 31 Priority Levels, 256 Vectors s Built-In Floating Point Unit
- Fully IEEE 754 patible s Easy to Use, High Bandwidth 16-Bit Bus
- 25.6 Mbytes/s Burst
- Up to...