82434LX - PCI/ CACHE AND MEMORY CONTROLLER PCMC

This page provides the datasheet information for the 82434LX, a member of the 824 PCI/ CACHE AND MEMORY CONTROLLER PCMC family.

Datasheet Summary

Description

2 1 Host Interface 2 2 DRAM Interface 2 3 Cache Interface 2 4 PCI Interface 2 5 LBX Interface 2 6 Reset And Clock 3 0 REGISTER DESCRIPTION 3 1 I O Mapped Registers 3 1 1 CONFADD CONFIGURATION ADDRESS REGISTER 3 1 2 CSE CONFIGURATION SPACE ENABLE REGISTER 3 1 3 TRC TURBO-RESET CONTROL REGISTER 3 1 4

Features

9 6 17.

Intel Corporation

📥 Download Datasheet

Datasheet Details

Part number	82434LX
Manufacturer	Intel Corporation
File Size	2.59 MB
Description	PCI/ CACHE AND MEMORY CONTROLLER PCMC
Datasheet	82434LX Datasheet
Additional preview pages of the 82434LX datasheet.

📁 Similar Datasheet

82438FX - PCIset System Controller (Intel)
82439HX - System Controller (Intel)
82439TX - System Controller (Intel)
82400102 - TVS Diode Array (Wurth)
8242AH - Universal Peripheral Interface 8-Bit Slave Microcontroller (Intel)

Other Datasheets by Intel Corporation

82434NX - PCI/ CACHE AND MEMORY CONTROLLER PCMC
82433LX - LOCAL BUS ACCELERATOR
82433NX - LOCAL BUS ACCELERATOR
82443BX - Host Bridge/Controller
82443LX - INTEL 440LX AGPSET: 82443LX PCI A.G.P. CONTROLLER
82443ZX - 440ZX AGPset: Host Bridge/Controller
82451NX - Intel 450NX PCIset
82452NX - Intel 450NX PCIset

Full PDF Text Transcription

Click to expand full text

82434LX 82434NX PCI CACHE AND MEMORY CONTROLLER (PCMC) Y Supports the Pentium TM Processor at iCOMP TM Index 510T60 MHz and iCOMP Index 567T66 MHz Supports the Pentium Processor at iCOMP Index 735T90 MHz iCOMP Index 815T100 MHz and iCOMP Index 610T75 MHz Supports Pipelined Addressing Capability of the Pentium Processor The 82430NX Drives 3 3V Signal Levels on the CPU and Cache Interfaces High Performance CPU PCI Memory Interfaces via Posted Write and Read Prefetch Buffers Fully Synchronous PCI Interface with Full Bus Master Capability Supports the Pentium Processor Internal Cache in Either Write-Through or Write-Back Mode Programmable Attribute Map of DOS and BIOS Regions for System Flexibility Integrated Low Skew Clock Driver for Distributing Host Clock Integrated Second Level Cache Cont

Published: Mar 22, 2005 |