E8870SP Description
Intel® E8870SP Scalability Port Switch (SPS) Datasheet Product.
E8870SP Key Features
- Six SPs with 3.2 GB/s peak bandwidth per direction per SP
- Bi-directional SPs for a total bandwidth of 38.4 GB/s. Integrated Snoop Filter
- 1 MB 12-way set associative tag array capable of maintaining state of 200K cache lines
- Partitioned into four interleaves, each interleave can be accessed in parallel
- Supports up to 266M look-up and update (LUU) operations per second
- Pseudo Least Recently Used (PLRU) replacement algorithm, with updates on look-ups and invalidates
- ECC coverage, with correction of single bit errors, detection of double bit errors
- Fast array initialization and/or self test through configuration register access. Multiple Processor Node Support
- Conflict detection logic to maintain memory consistency for coherent memory across multiple processor nodes
- Advanced address mapping and decode capabilities enable flexible routing of transactions based on address and/or transac