GD82559ER
Features s
Optimum Integration for Lowest Cost Solution
- Integrated IEEE 802.3 10BASE-T and 100BASE-TX patible PHY
- Glueless 32-bit PCI master interface
- 128 Kbyte Flash interface
- Thin BGA 15mm2 package
- ACPI and PCI Power Management
- Power management event on “interesting” packets and link status change support
- Test Access Port s
High Performance Networking Functions
- Chained memory structure similar to the 82559,82558, 82557, and 82596
- Improved dynamic transmit chaining with multiple priorities transmit queues
- Full Duplex support at both 10 and 100 Mbps
- IEEE 802.3u Auto-Negotiation support
- 3 Kbyte transmit and 3 Kbyte receive FIFOs
- Fast back-to-back transmission support with minimum interframe spacing
- IEEE 802.3x 100BASE-TX Flow Control support
- Low Power Features
- Low power 3.3 V device
- Efficient dynamic standby mode
- Deep power down support
- Clockrun protocol support
Document Number: 714682-001 Revision 1.0 March 1999
- Networking...
