LU82541ER Datasheet PDF - Intel Corporation Gigabit Ethernet Controller Specs

LU82541ER - Gigabit Ethernet Controller

Datasheet Summary

Description

Updated signal names to match design guide and reference schematics.

Added lead free information.

Added information about migrating from a 2-layer 0.36 mm wide-trace substrate to a 2-layer 0.32 mm wide-trace substrate.

Refer to the section on Package and Pinout Information.

Features

PCI Bus.
PCI revision 2.3, 32-bit, 33/66 MHz.
Algorithms that optimally use advanced PCI, MWI, MRM, and MRL commands.
3.3 V (5 V tolerant PCI signaling) MAC Specific.
Low-latency transmit and receive queues.
IEEE 802.3x-compliant flow-control support with software-controllable thresholds.
Caches up to 64 packet descriptors in a single burst.
Programmable host memory receive buffers (256 B to 16 KB) and cache line.

Datasheet Details

Part number	LU82541ER
Manufacturer	Intel Corporation
File Size	394.93 KB
Description	Gigabit Ethernet Controller
Datasheet	LU82541ER Datasheet
Additional preview pages of the LU82541ER datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com 82541ER Gigabit Ethernet Controller Networking Silicon Datasheet Product Features ■ ■ ■ PCI Bus — PCI revision 2.3, 32-bit, 33/66 MHz — Algorithms that optimally use advanced PCI, MWI, MRM, and MRL commands — 3.3 V (5 V tolerant PCI signaling) MAC Specific — Low-latency transmit and receive queues — IEEE 802.3x-compliant flow-control support with software-controllable thresholds — Caches up to 64 packet descriptors in a single burst — Programmable host memory receive buffers (256 B to 16 KB) and cache line size (16 B to 256 B) — Wide, optimized internal data path architecture — 64 KB configurable Transmit and Receive FIFO buffers PHY Specific — Integrated for 10/100/1000 Mb/s operation — IEEE 802.3ab Auto-Negotiation support — IEEE 802.

Published: Oct 23, 2007 |