N82C55A - CHMOS PROGRAMMABLE PERIPHERAL INTERFACE

Product Overview

Intel Corporation

Datasheet Details

Part number	N82C55A
Manufacturer	Intel Corporation
File Size	357.56 KB
Description	CHMOS PROGRAMMABLE PERIPHERAL INTERFACE
Datasheet	N82C55A Datasheet
Additional preview pages of the N82C55A datasheet.

Product details

Description

Symbol PA3 0 RD CS Pin Number Dip PLCC 1 4 5 6 2 5 6 7 Type I O I I Name and Function PORT A PINS 0 3 Lower nibble of an 8-bit data output latch buffer and an 8-bit data input latch READ CONTROL This input is low during CPU read operations CHIP SELECT A low on this input enables the 82C55A to respond to RD and WR signals RD and WR are ignored otherwise System Ground I ADDRESS These input signals in conjunction RD and WR control the selection of one of the three

Features

or ‘‘personality’’ to further enhance the power and flexibility of the 82C55A Port A One 8-bit data output latch buffer and one 8-bit input latch buffer Both ‘‘pull-up’’ and ‘‘pulldown’’ bus hold devices are present on Port A Port B One 8-bit data input output latch buffer Only ‘‘pull-up’’ bus hold devices are present on Port B Port C One 8-bit data output latch buffer and one 8-bit data input buffer (no latch for input) This port can be divided into two 4-bit ports under the mode control Each 4.

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Published: Aug 16, 2008 |