Datasheet4U Logo Datasheet4U.com

PC28F640P30 - Intel StrataFlash Embedded Memory

General Description

at any time, without notice.

This document contains information on products in the design phase of development.

The information here is subject to change without notice.

Key Features

  • High performance.
  • Security.
  • 85/88 ns initial access.
  • One-Time Programmable Registers:.
  • 64 unique factory device identifier bits.
  • 40 MHz with zero wait states, 20 ns clock-to.
  • 64 user-programmable OTP bits data output synchronous-burst read mode.
  • Additional 2048 user-programmable OTP bits.
  • 25 ns asynchronous-page read mode.
  • Selectable OTP Space in Main Array:.
  • 4-, 8-, 16-, and continuous-word burst mode.

📥 Download Datasheet

Datasheet Details

Part number PC28F640P30
Manufacturer Intel Corporation
File Size 1.57 MB
Description Intel StrataFlash Embedded Memory
Datasheet download datasheet PC28F640P30 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
PC28F640P30BF65 64-Mbit Single Bit per Cell P30-65nm Flash Memory Numonyx
PC28F640P30TF65 64-Mbit Single Bit per Cell P30-65nm Flash Memory Numonyx
PC28F640P33BF60 128-Mbit Single Bit per Cell Single Bit per Cell Numonyx
PC28F640P33TF60 128-Mbit Single Bit per Cell Single Bit per Cell Numonyx
PC28F640 Embedded Flash Memory Numonyx

Other Datasheets by Intel Corporation

Part Number Description
PC28F128J3A StrataFlash Memory
PC28F128J3C StrataFlash Memory
PC28F128P30 StrataFlash Embedded Memory
PC28F256 Intel StrataFlash Memory
PC28F256P30 Intel StrataFlash Embedded Memory

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Intel StrataFlash® Embedded Memory (P30) 1-Gbit P30 Family Datasheet Product Features ■ High performance ■ Security — 85/88 ns initial access — One-Time Programmable Registers: • 64 unique factory device identifier bits — 40 MHz with zero wait states, 20 ns clock-to• 64 user-programmable OTP bits data output synchronous-burst read mode • Additional 2048 user-programmable OTP bits — 25 ns asynchronous-page read mode — Selectable OTP Space in Main Array: — 4-, 8-, 16-, and continuous-word burst mode • 4x32KB parameter blocks + 3x128KB main — Buffered Enhanced Factory Programming blocks (top or bottom configuration) (BEFP) at 5 µs/byte (Typ) — Absolute write protection: VPP = VSS — 1.