TN80C31BH Datasheet | Intel Corporation

features 4 Kbytes of EPROM ROM (87C51 80C51BH respectively) 128 bytes of RAM 32 I O lines two 16-bit timer counters a five-source two-level interrupt structure a full duplex serial port and on-chip oscillator and clock circuitry In addition the MCS 51 CHMOS microcontroller products exhibit low operating power along with two software selectable modes of reduced activity for further power reduction Idle and Power Down The Idle mode freezes the CPU while allowing the RAM timer counters serial port and interrupt system to continue functioning The Power Down mode saves the RAM contents but freezes the oscillator causing all other chip functions to be inoperative The 87C51 is the EPROM version of the 80C51BH It contains 4 Kbytes of on-chip program memory that can be electrically programmed and can be erased by exposure to ultraviolet light The 87C51 EPROM array uses a modified Quick-Pulse Programming algorithm by which the entire 4 Kbyte array can be programmed in about 12 seconds NOTICE This datasheet contains information on products in full production Specifications within this datasheet are subject to change without notice Verify with your local Intel sales office that you have the latest datasheet before finalizing a design Other brands and names are the property of their respective owners Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make changes to these specifications at any time without notice Microputer Products may have minor variations to this...