Intel 5100
Memory Controller
DESCRIPTION
................................................................................................... 33 2.1 Processor Front Side Bus Signals ......................................................................... 35 2.1.1 Processor Front Side Bus 0 ...................................................................... 35 2.1.2 Processor Front Side Bus 1 ...................................................................... 40 2.2 DDR2 Memory Channels ..................................................................................... 44 2.2.1 DDR2 Channel 0..................................................................................... 44 2.2.2 DDR2 Channel 1..................................................................................... 46 2.3 PCI Express* Signal List ..................................................................................... 48 2.3.1 PCI Express* Common Signals ................................................................. 48 2.3.2 PCI Express* Port 0, Enterprise South Bridge Interface (ESI) .......................