82439HX Description
4-2-2-2 Reads and x-2-2-2 Writes at 60 MHz; The TXC is a single-chip host-to-PCI bridge and provides the second level cache control and DRAM control functions. The second level (L2) cache controller supports a write-back cache policy for cache sizes of 256 Kbytes and 512 Kbytes.