• Part: CD2481
  • Description: Programmable 4-Channel Communications Controller
  • Manufacturer: Intel
  • Size: 2.48 MB
Download CD2481 Datasheet PDF
Intel
CD2481
CD2481 is Programmable 4-Channel Communications Controller manufactured by Intel.
.. Programmable Four-Channel munications Controller The CD2481 is a four-channel synchronous/asynchronous munications controller specifically designed to reduce host-system processing overhead and increase efficiency in a wide variety of munications applications. A special member of the CD24X1 family, the device allows easy field upgrades and enhancement with an on-chip 8K-word microcode store for downloaded control code. The CD2481 is packaged in a 100-pin MQFP package that offers 10 data/clock/modem pins per channel. The device has four fully independent serial channels to support standard asynchronous, PPP, MNP4, SLIP, bit-synchronous (HDLC), and bytesynchronous (bisync, X.21) protocols. The device is non-functional until the microcode is downloaded; only a small boot ROM with code to perform device initialization is included. The device is based on a proprietary on-chip RISC processor that performs all the time-critical, low-level tasks otherwise performed by the host system. The CD2481 boosts system efficiency with eight on-chip DMA channels, on-chip FIFOs (16 bytes/direction), intelligent vectored interrupts, and intelligent protocol processing. The on-chip DMA controller provides ‘fire-and-forget’ transmit support - the host need only inform the CD2481 of the location of the packet to send. Similarly, on receive, the CD2481 automatically receives a plete packet with no host intervention or assistance. The DMA controller also has a transmit ‘Append mode’ for use in asynchronous applications. The DMA controller uses a dual-buffer scheme that easily implements simple or plex buffer schemes. Each channel and direction in the dual-buffer scheme has two active buffers. The CD2481 can be programmed to interrupt the host at the pletion of a frame or buffer. In applications where buffers are of a small, fixed size, the dual-buffer scheme allows large frames to be divided into multiple buffers. For applications...