Description
Name and Function
ADDRESS INPUTS for memory addresses Addresses are internally latched during a write cycle
DATA INPUT OUTPUT Inputs data during memory write cycles outputs data during memory read cycles The data pins are active high and float to tri-state OFF when the chip is deselected or the outp
Features
- g10% VCC Tolerance Maximum Latch-Up Immunity through EPI Processing
Y ETOXTM Nonvolatile Flash Technology EPROM-Compatible Process Base High-Volume Manufacturing Experience
Y JEDEC-Standard Pinouts 32-Pin Plastic Dip 32-Lead PLCC 32-Lead TSOP
(See Packaging Spec Order 231369)
Y Extended Temperature Options
Intel’s 28F010 CMOS flash memory offers the most cost-effective and reliable alternative for read write random access nonvolatile memory The 28F010 adds electrical chip-erasure and reprogramm.