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JS28F128J3C - StrataFlash Memory

Download the JS28F128J3C datasheet PDF. This datasheet also covers the JS28F256J3C variant, as both devices belong to the same strataflash memory family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • Datasheet.
  • Performance.
  • Architecture.
  • 110/115/120/150 ns Initial Access Speed.
  • Multi-Level Cell Technology: High.
  • 125 ns Initial Access Speed (256 Mbit density only).
  • 25 ns Asynchronous Page mode Reads.
  • 30 ns Asynchronous Page mode Reads (256Mbit density only).
  • 32-Byte Write Buffer.
  • 6.8 µs per byte effective programming time.
  • Software Density at Low Cost.
  • High-Density Symmetrical 128-Kbyte Blocks.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (JS28F256J3C-IntelCorporation.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number JS28F128J3C
Manufacturer Intel
File Size 510.88 KB
Description StrataFlash Memory
Datasheet download datasheet JS28F128J3C Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
JS28F128J3A Intel StrataFlash Memory Intel Corporation
JS28F128J3D-75 Numonyx Embedded Flash Memory Intel Corporation
JS28F128J3F75 128-Mbit Single Bit per Cell Embedded Flash Memory Numonyx
JS28F128M29EWHF Parallel NOR Flash Embedded Memory Micron
JS28F128M29EWLA Parallel NOR Flash Embedded Memory Micron

Other Datasheets by Intel

Part Number Description
JS28F16 (JS28Fxxx) Advanced Boot Block Flash Memory
JS28F160B3 (JS28Fxxx) Advanced Boot Block Flash Memory
JS28F008 (JS28Fxxx) Advanced Boot Block Flash Memory
JS28F256J3C StrataFlash Memory
JS28F320B3 (JS28Fxxx) Advanced Boot Block Flash Memory

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Intel StrataFlash® Memory (J3) 256-Mbit (x8/x16) Product Features Datasheet ■ Performance ■ Architecture — 110/115/120/150 ns Initial Access Speed — Multi-Level Cell Technology: High — 125 ns Initial Access Speed (256 Mbit density only) — 25 ns Asynchronous Page mode Reads — 30 ns Asynchronous Page mode Reads (256Mbit density only) — 32-Byte Write Buffer —6.8 µs per byte effective programming time ■ Software Density at Low Cost — High-Density Symmetrical 128-Kbyte Blocks —256 Mbit (256 Blocks) (0.