Description
RESET A high on this input pin resets the M82510 to the Default Wake-up mode CHIP SELECT A low on this input pin enables the M82510 and allows read or write operations ADDRESS PINS These inputs interface with three bits of the System Address Bus to select one of the internal registers for read or write DATA BUS Bidirectional three state eight-bit Data Bus These pins allow transfer of bytes between the CPU and the M82510 READ A low on this input pin allows the CPU to read Data or Status bytes fro
Features
- dual FIFOs and Control Character Recognition (CCR) dramatically reduce CPU interrupts and increase software efficiency The M82510’s software versatility allows emulation of the INS 8250A 16450 for IBM PC AT compatibility or a high performance mode configured by 35 control registers All interrupts are maskable at 2 levels The multi-personality I O pins are configurable as desired A DPLL and multiple sampling of serial data improve data reliability for high speed asynchronous communication The com.
M82510 Datasheet
