FEATURES
s CONSTRAINT LENGTH 7 s CODING RATES 1/2 AND 1/3 s THREE BIT SOFT-DECISION INPUTS IN SIGNED MAGNITUDE OR 2’s COMPLEMENT FORMAT s CODING GAIN OF 6.0 dB (AT 10–5 BER, RATE 1/3) s INDUSTRY STANDARD POLYNOMIALS G1 = 1718, G2 = 1338, G3 = 1458, s 512 Kbps DATA RATE (0° to 70° C) s CODING GAIN OF 5.2 dB (AT 10-5 BER, RATE 1/2) s LOW POWER CONSUMPTION s 44 PIN PLCC AND CLDCC PACKAGES s AVAILABLE TO MIL-STD 883C BLOCK DIAGRAM DATACLK DATAIN Q1 7-BIT SHIFT REGISTER Q2 Q3 Q4 Q5 Q6 Q7 ENCODER SECTION OSY MB "INV G2" SCRAMBLER AND 3:1 MUX D Q LATCH SEL A, B MODE ERATE ENLATCH RESET SCRAMBL OCLK ICLK DRDY ACK DRATE SYNC0 SYNC1 3 3 3 2 MODE SELECT AND CONTROL 2 SELECT (TO ALL REGS.) DECODER SECTION ADDRESS SEQUENCER AND CONTROL LOGIC STATE-METRIC RAM TRELLIS RAM ADDR G1D 2-0 G2D 2-0 G3D 2-0 SM2C "INV G2" DESCRAMBLER, BUFFER REG. & MUX. DAT A BRANCH METRIC AND ADD-COMPARESELECT LOGIC PATH HISTORY AND AUTO NODE-SYNC LOGIC DOUT SYNC SST0 SST1 MIS 3 THRESH STEL-5269+512 2 FUNCTIONAL DESCRIPTION
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Intel
