InterFET J556
The 50V InterFET J556 and J557 JFET’s are targeted for current regulation and limiting applications. The SOT23 package is pinned out as a standard JFET and is required by the user to connect the Gate to the Source or Drain.FEATURES
● InterFET N0016H Geometry● Low Noise: 5 nV/√Hz Typical
● Low Capacitance: 2pF Typical
● RoHS Compliant
● SMT, TH, and Bare Die Package options.
APPLICATIONS
● Current Regulation● Current Limiting
● Biasing
DESCRIPTION
Product Summary Parameters VOP Peak Operating Voltage IF Regulator Current VL Limiting Voltage Source 1 Drain 2 Cathode 2 Anode 1 J556 Min 50 2.4 0.75 (typ) SOT23 Top View 3 Gate TO-92 Bottom View J557 Min Unit 50 V 3.6 mA 1.5 (typ) V Ordering Information Custom Part and Binning Options Available Part NumberDESCRIPTION
Case J556; J557 Through-Hole TO-92-2L SMPJ556; SMPJ557 Surface Mount SOT23 7“ Tape and Reel: Max 3,000 Pieces SMPJ556TR; SMPJ557TR 13” Tape and Reel: Max 9,000 Pieces SOT23 J556COT; J557COT Chip Orientated Tray (COT Waffle Pack) COT J556CFT; J557CFT Chip Face-up Tray (CFT Waffle Pack) CFT Packaging Bulk Bulk Minimum 1,000 Pieces Tape and Reel 400/Waffle Pack 400/Waffle Pack Disclaimer: It is the Buyers responsibility for designing, validating and testing the end application under all field use cases and extreme use conditions.