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IR2010SPBF - High and Low Side Driver

Download the IR2010SPBF datasheet PDF. This datasheet also covers the IR2010 variant, as both devices belong to the same high and low side driver family and are provided as variant models within a single manufacturer datasheet.

General Description

The IR2010 is a high power, high voltage, high speed power MOSFET and IGBT driver with independent high and low side referenced output channels.

Logic inputs are compatible with standard CMOS or LSTTL output, down to 3.0V logic.

Key Features

  • Product Summary.
  • Floating channel designed for bootstrap operation.
  • Fully operational to 200V.
  • Tolerant to negative transient voltage, dV/dt immune.
  • Gate drive supply range from 10 to 20V.
  • Undervoltage lockout for both channels.
  • 3.3V logic compatible.
  • Separate logic supply range from 3.3V to 20V.
  • Logic and power ground +/-5V offset.
  • CMOS Schmitt-triggered inputs with pull-down.
  • Shut down input turns off both channels.
  • Cross-conduction prev.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IR2010-InternationalRectifier.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by International Rectifier (now Infineon)

Part Number Description
IR2010 High and Low Side Driver
IR2010PBF High and Low Side Driver
IR2011 High and Low Side Driver
IR2011PBF High and Low Side Driver
IR2011S High and Low Side Driver

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
IR2010(S)PBF High and Low Side Driver Features Product Summary  Floating channel designed for bootstrap operation  Fully operational to 200V  Tolerant to negative transient voltage, dV/dt immune  Gate drive supply range from 10 to 20V  Undervoltage lockout for both channels  3.3V logic compatible  Separate logic supply range from 3.3V to 20V  Logic and power ground +/-5V offset  CMOS Schmitt-triggered inputs with pull-down  Shut down input turns off both channels  Cross-conduction prevention logic  Matched propagation delay for both channels  Outputs in phase with inputs VOFFSET (max) IO+/- (typ) VOUT ton/off (typ) Delay Matching (max) 200V 3.0A / 3.