Download IR21271S Datasheet PDF
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IR21271S Description

Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is patible with standard CMOS or LSTTL outputs, down to 3.3V. The protection circuity detects over-current in the driven power transistor and terminates the gate drive voltage.

IR21271S Key Features

  • Floating channel designed for bootstrap operation
  • Avaliable in Lead-Free