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CD40109BMS - CMOS Quad Low-to-High Voltage Level Shifter

General Description

CD40109BMS contains four low-to-high voltage level shifting circuits.

Each circuit will shift a low voltage digital logic input signal (A, B, C, D) with logical 1 = VCC and logical 0 = VSS to a higher voltage output signal (E, F, G, H) with logical 1 = VDD and logical 0 = VSS.

Key Features

  • individual three-state output capability. A low level on any of the separately enabled three-state output controls produces a high impedance state in the corresponding output. The CD40109BMS is supplied in these 16-lead outline packages: Braze Seal DIP Frit Seal DIP Ceramic Flatpack H4T H1E H6W Features.
  • High Voltage Type (20V Rating).
  • Independence of Power Supply Sequence Considerations - VCC can Exceed VDD - Input Signals can Exceed Both VCC and VDD.
  • Up and Down Lev.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CD40109BMS December 1992 CMOS Quad Low-to-High Voltage Level Shifter Description CD40109BMS contains four low-to-high voltage level shifting circuits. Each circuit will shift a low voltage digital logic input signal (A, B, C, D) with logical 1 = VCC and logical 0 = VSS to a higher voltage output signal (E, F, G, H) with logical 1 = VDD and logical 0 = VSS. The CD40109BMS, unlike other low-to-high level shifting circuits, does not require the presence of the high voltage supply (VDD) before the application of either the low voltage supply (VCC) or the input signals. There are no restrictions on the sequence of application of VDD, VCC, or the input signals.